1. Field of the Invention
The present invention is directed to a method for thin film lift-off of metals using a laterally extended or xe2x80x9cTxe2x80x9d shaped etching (or etch) mask. In particular, a controllable lateral extension can be formed on the etching mask after an etching process has taken place. The etching mask with the lateral extension can be used for the deposition of a non-contiguous thin film of metal (or other material) on a substrate. The method of the present invention can be part of a process step during the fabrication of electronic devices such as integrated circuits.
2. Related Art
Integrated circuits, such as transistors (field effect transistors (FETs), high electron mobility transistors (HEMTs), metal-semiconductor field effect transistors (MESFETs), heterostructure bipolar transistors (HBTs), etc.), diodes, lasers and other circuits using patterned, aligned, and/or non-contiguous metals, can be formed on substrates by a variety of conventional processes.
For example, in a conventional subtractive etching process, a complete or continuous layer of metal is deposited on a substrate. The layer of metal then receives a coating of photoresist that is patterned lithographically using exposure and development techniques. The patterned photoresist serves as a protective material during the metal etching step where the unprotected metal is removed. The undesired metal is removed or etched away by conventional wet chemical etching processes, ion milling, and/or dry etching processes.
Another conventional fabrication method involves creating patterned thin metal layers on a substrate by utilizing overhanging structures. The overhanging structures define areas intended to remain free of metal during the metal deposition step. These protective overhanging structures receive a coating of metal that can be lifted off with metal remaining only in the areas unprotected by the overhanging structure.
For example, in one conventional method, shown in FIGS. 1A-1E, a patterned photoresist and dielectric can be utilized. In FIG. 1A, a photoresist 2 is deposited on a dielectric layer 8, which is deposited on a metal 10, which is deposited on a substrate 12. In FIG. 1B, the photoresist is exposed to radiation through a conventional photo-mask, exposing regions 4 and 6. Following development or removal of the exposed regions, the patterned structure 16 remains in FIG. 1C. A selective etchant is then used to remove the dielectric layer 8 in the uncovered regions. The dielectric can be xe2x80x9coverxe2x80x9d etched to reduce the dimensions of the dielectric such that the lateral dimension is less than the patterned photoresist 16 (i.e. the dimension x is less than the dimension xxe2x80x2). Another selective etchant can then be used to remove portions of the metal layer 10 where the dielectric material acts as an etching mask.
The above process creates a metal area 20 that can be used as part of a device, e.g., as a gate in a transistor structure. After this etch, a second metal deposition can be performed over the entire structure (see layers 22, 24, 26) as shown in FIG. 1F. Due to the presence of the overhanging structure 16, metals (22 and 24) are deposited on either side of layer 20 and are spaced away from 20, creating non-contiguous metal layers. The photoresist and dielectric can then be removed and the metal 26 atop the photoresist is lifted off. The final arrangement of metals are shown in FIG. 1G.
There are several problems with the aforementioned conventional process. The lateral dimension of the overhang is difficult to control to the degree required by conventional semiconductor manufacturing standards. The problem is compounded since the dielectric area under the patterned photoresist is not the same as the initial photo-mask dimensions. Thus, for example, the width of the line (x) shown in FIG. 1C in the unexposed area is not the equal to the width of the line (xxe2x80x2) defined by structure 18 in FIG. 1D. The width of the metal line 20 is the result of an overetch that is typically difficult to control. This discrepancy is problematic since the dimensions of metal lines are critical in semiconductor fabrication technology.
In addition, there are various device fabrication designs that require portions of the substrate to be etched prior to the deposition of metal on either side of a patterned structure. The use of conventional etching processes to etch away these areas of the substrate can be problematic. For example, many chemical solutions, primarily acids and bases, that are used to etch semiconductor materials, remove the material preferentially along crystallographic directions. This lack of symmetry in the etch rate and profile in different directions in the etched material is undesirable. Most of the substrate materials used in the semiconductor industry are single crystal materials, which often preferentially etch at different rates along different crystal planes (e.g. silicon, gallium arsenide, indium phosphide, cadmium telluride, indium antimonide, plus all related combinations of group II and VI elements, and combinations of group III and V elements).
Two such example structures are shown in FIGS. 2A and 2B. These figures show overhanging photoresist layers 30 and 32, disposed on etched substrates 31 and 33, respectively. These figures illustrate the resulting features 34 and 35 with sloped substrate sidewalls. These sloped substrate sidewall profiles can be unsatisfactory when uniform patterning is desired on all features in all orientations. Similar unsatisfactory crystallographic profiles are often generated during dry etching when the process is primarily chemical in nature. The crystallographic nature of etching can lead to undesirable undercut that can limit the minimum feature sizes that can be created.
Non-crystallographic wet and dry chemical processes are also available for the material removal or etching step. In this case, material may be removed leaving a curved undercut profile such as that shown in FIG. 3. The degree of undercut is difficult to control as there is often a difference between the vertical and horizontal etching rates. A common result is a small xe2x80x9cfootxe2x80x9d or extended region at the base of the etched structure. The substrate in semiconductor devices is frequently comprised of multiple layers of epitaxial material, some of which are etched during device fabrication. At this xe2x80x9cfootxe2x80x9d, epitaxial layers are exposed and there is a strong possibility of inducing a electrical short between layers when metal is deposited in these regions.
For example, as shown in FIG. 3, a semiconductor material can include vertically stacked epitaxial layers 41, 42, and 43 deposited on a substrate 40. During isotropic etching of layer 43 (which can be performed to create an emitter region in a HBT type device), recessed or undercut side walls 44 and 45 are formed with an extending xe2x80x9cfootxe2x80x9d at points 48 and 49. During deposition of contacts 46 and 47, the possibility of a short (e.g., between base contacts 46 and 47 and emitter 43) is very high. An example of such a conventional method of fabricating a heterostructure bipolar transistor using isotropic etching is described in U.S. Pat. No. 5,804,487. Thus, an isotropic dry etch capable of producing an undercut typically forms the described sidewall profile that resembles a scallop or half circle. This type of profile is sufficient to satisfy the requirements for metal lift-off but is often inadequate for separating the deposited metal from the active portion of the etched substrate or device.
Thus, what is needed is a more controllable method to create an overhanging structure in order to form non-contiguous thin metals on a substrate, where the spacing of contacts can be controlled and the likelihood of electrical shorts can be reduced or eliminated.
In view of the foregoing, it would be desirable to provide a method for thin film lift-off of metals using a laterally extended etching mask. According to one embodiment of the present invention, a method for forming an etching mask structure on a substrate comprises etching the substrate, laterally expanding the etching mask structure, and depositing a self-aligned metal layer that is aligned to the originally masked area. The etching can be isotropic or anisotropic. The self-aligned metal layer can be distanced from the original etching masked area based on the extent of the intentionally laterally expanded etching mask layer. Following metal deposition, the initial mask structure can be removed, thus lifting off the metal atop it.
The etching mask structure can be a resist and can be formed using conventional photolithography materials and techniques and can have nearly vertical sidewalls. The lateral extension can include a silylation technique of the etching mask layer following etching. The silylated structure forms an overhang used to prevent the subsequently deposited metal layer from being continuous. The method according to this embodiment can be used to form a semiconductor structure that includes a patterned feature having substantially vertical sidewalls (i.e., anisotropically etched) or one with curved shaped, sloping sidewalls (i.e. isotropically etched) and with metal spaced at a particular (or required) distance from the substrate feature. Material other than metal that can be deposited in a line of sight from the source to the substrate (e.g., polysilicon and the like) may also be utilized with this method.
According to a second embodiment, a method includes forming an etching mask structure on a substrate in an area where a first layer of metal has been previously deposited. The etching mask structure can be a resist formed with photolithography materials and techniques and can have nearly vertical sidewalls. The etching mask protects/shields the portion of the first metal layer disposed under the etching mask from being removed during a removal process. Substrate areas not protected by the etching mask (e.g., where the metal or material was removed previously) can then be etched (e.g., isotropically or anisotropically) with either a wet or dry etching chemistry.
The method according to this embodiment can also include laterally expanding the etching mask structure by silylating the resist layer or etching mask, where the silylating expands the resist layer in a lateral direction parallel to the substrate surface. A second metal layer is deposited and is self-aligned to the originally masked area. The self-aligned metal layer is thus distanced from the originally masked area based on the extent of the intentionally laterally expanded mask layer. Following metal deposition, the initial etching mask structure can be removed, thus lifting off the metal atop it.
The method according to this embodiment can be used to form a semiconductor structure that includes a patterned substrate feature having substantially vertical sidewalls (i.e. anisotropically etched) or one with curved shaped, sloping sidewalls (i.e. isotropically etched) and with metal spaced at a required distance from the substrate feature. Material other than metal that is typically deposited in a line of sight from the source to the substrate may also be deposited in this method.
Further features and advantages of the invention, as well as the structure and operation of various embodiments of the invention, are described in detail below with reference to the accompanying drawings.